Standardlikelihood: Lowseverity: Very HighStable
CAPEC-663Exploitation of Transient Instruction Execution
Abstraction
Standard
Status
Stable
Likelihood
Low
Severity
Very High
Description
An adversary exploits a hardware design flaw in a CPU implementation of transient instruction execution to expose sensitive data and bypass/subvert access control over restricted resources. Typically, the adversary conducts a covert channel attack to target non-discarded microarchitectural changes caused by transient executions such as speculative execution, branch prediction, instruction pipelining, and/or out-of-order execution. The transient execution results in a series of instructions (gadgets) which construct covert channel and access/transfer the secret data.
Related weaknesses· 3
Related attack patterns· 6
Exploits3
| Type | Target | Confidence | Tier |
|---|---|---|---|
| Weakness | Non-Transparent Sharing of Microarchitectural Resourcescwe-1303 | 100% | live |
| Weakness | Processor Optimization Removal or Modification of Security-critical Codecwe-1037 | 100% | live |
| Weakness | Hardware Logic with Insecure De-Synchronization between Control and Data Channelscwe-1264 | 100% | live |
Related by meaning· 6
Nearest entities by semantic similarity across the cs-graph corpus.