BaseIncomplete

CWE-1232Improper Lock Behavior After Power State Transition

Category: other

Description

Register lock bit protection disables changes to system configuration once the bit is set. Some of the protected registers or lock bits become programmable after power state transitions (e.g., Entry and wake from low power sleep modes) causing the system configuration to be changeable.

Common consequences· 1

  • Access Control — Modify Memory

Potential mitigations· 1

  • [Architecture and Design, Implementation, Testing]

Related CAPEC attack patterns· 1

CAPEC-166

References

  1. https://cwe.mitre.org/data/definitions/1232.html

Exploits (incoming)1

TypeTargetConfidenceTier
AttackPatternForce the System to Reset Valuescapec-166100%live

Related by meaning· 6

Nearest entities by semantic similarity across the cs-graph corpus.

CWE
Improper Prevention of Lock Bit Modification
CWE
Insufficient Granularity of Address Regions Protected by Register Locks
CWE
Sequence of Processor Instructions Leads to Unexpected Behavior
CWE
Improperly Preserved Integrity of Hardware Configuration State During a Power Save/Restore Operation
CWE
Sensitive Information Uncleared Before Debug/Power State Transition
CWE
Security-Sensitive Hardware Controls with Missing Lock Bit Protection
Sourced from MITRE CWE 4.20. Curated for EU compliance use cases by Adam Lundqvist, Founder at SQUR.