Detailedlikelihood: Lowseverity: HighDraft

CAPEC-672Malicious Code Implanted During Chip Programming

Abstraction
Detailed
Status
Draft
Likelihood
Low
Severity
High

Description

Metadata: detailed CAPEC pattern, status draft, likelihood low, severity high. Mapped ATT&CK technique: [object Object]. Related CAPEC pattern: [object Object]. Metadata: detailed CAPEC pattern, status draft, likelihood low, severity high. Mapped ATT&CK technique: [object Object]. Related CAPEC pattern: [object Object].

MITRE ATT&CK crosswalk· 1

T1195.003: Supply Chain Compromise: Compromise Hardware Supply Chain

Related attack patterns· 1

CAPEC-444 (ChildOf)

Related to1

TypeTargetConfidenceTier
SubTechniqueCompromise Hardware Supply Chaint1195.003100%live

Related by meaning· 6

Nearest entities by semantic similarity across the cs-graph corpus.

CAPEC
Design for FPGA Maliciously Altered
CAPEC
Malicious Software Implanted
CAPEC
Malicious Logic Insertion into Product Software via Configuration Management Manipulation
CAPEC
Server Motherboard Compromise
CAPEC
Developer Signing Maliciously Altered Software
CAPEC
System Build Data Maliciously Altered
Sourced from MITRE CAPEC. Curated by Adam Lundqvist, SQUR.